Strained Silicon Layer in CMOS Technology
نویسندگان
چکیده
منابع مشابه
Modeling Techniques for Strained CMOS Technology
Downscaling of MOSFETs as institutionalized by Moore's law is successfully continuing because of innovative changes in the technological processes and the introduction of new materials. The 32nm MOSFET process technology recently developed by Intel [1] involves new hafnium-based high-k dielectric/metal gates and represents a major change in the technological process since the invention of MOSFE...
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ژورنال
عنوان ژورنال: Electronics ETF
سال: 2014
ISSN: 1450-5843
DOI: 10.7251/els1418063p